A 110-core chip has been developed by Massachusetts Institute of Technology as it looks for power-efficient ways to boost performance in mobile devices, PCs and servers.
The processor, called the Execution Migraine Machine, tries to determine ways to reduce traffic inside chips, which enables faster and more power-efficient computing, said Mieszko Lis, a postgraduate student and Ph.D. candidate at MIT, during a presentation at the Hot Chips conference in California.
The chip is a general purpose processor and not an accelerator like a graphics processor. Typically a lot of data migration takes place between cores and cache, and the 110-core chip has replaced the cache with a shared memory pool, which reduces the data transfer channels. The chip is also able to predict data movement trends, which reduces the number of cycles required to transfer and process data.
The benefits of power-efficient data transfers could apply to mobile devices and databases,For example, data-traffic reduction will help mobile devices efficiently process applications like video, while saving power. It could also help reduce the amount of data sent by a mobile device over a network.
Fewer threads and predictive data behavior could help speed up databases. It could also free up shared resources for other tasks, Lis said.
The researchers have seen up to 14 times the reduction in on-chip traffic, which significantly reduces power dissipation. According to internal benchmarks, the performance was 25% better compared to other processors, Lis said..... Lis did not specify the competitive processors used for benchmarks.
The chip has a mesh architecture with the 110 cores interconnected in a square design. It is based on custom architecture designed to deal with large data sets and to make data migration easier, Lis said. The code was also written specially to work with the processor.
The processor, called the Execution Migraine Machine, tries to determine ways to reduce traffic inside chips, which enables faster and more power-efficient computing, said Mieszko Lis, a postgraduate student and Ph.D. candidate at MIT, during a presentation at the Hot Chips conference in California.
The chip is a general purpose processor and not an accelerator like a graphics processor. Typically a lot of data migration takes place between cores and cache, and the 110-core chip has replaced the cache with a shared memory pool, which reduces the data transfer channels. The chip is also able to predict data movement trends, which reduces the number of cycles required to transfer and process data.
The benefits of power-efficient data transfers could apply to mobile devices and databases,For example, data-traffic reduction will help mobile devices efficiently process applications like video, while saving power. It could also help reduce the amount of data sent by a mobile device over a network.
Fewer threads and predictive data behavior could help speed up databases. It could also free up shared resources for other tasks, Lis said.
The researchers have seen up to 14 times the reduction in on-chip traffic, which significantly reduces power dissipation. According to internal benchmarks, the performance was 25% better compared to other processors, Lis said..... Lis did not specify the competitive processors used for benchmarks.
The chip has a mesh architecture with the 110 cores interconnected in a square design. It is based on custom architecture designed to deal with large data sets and to make data migration easier, Lis said. The code was also written specially to work with the processor.
